What is Jtag?

JTAG stands for Joint Test Action Group). It is boundary scan method of testing ICs and their interconnections. It uses a shift register built into the chip so that inputs could be shifted in and the resulting outputs could be shifted out. JTAG requires four I/O pins called clock(tclk), input data (tdi), output data(tdo), and state machine mode control(tms) and there are optional pins like tap reset (trst) etc. JTAG cells are also known as boundary scan cells. Boundary scan cells are small circuits placed just inside the I/O cells. The purpose is to enable data to/from the I/O through the boundary scan chain. The interface to these scan chains are called the TAP (Test Access Port), and the operation of the chains and the TAP are controlled by a JTAG controller inside the chip that implements JTAG.

No comments: